VHDL signed numbers arithmetics

Status
Not open for further replies.
And also note the difference in resizing the two types.
When resizing an unsigned, you just pre-pend '0's
When you resize signed, you pre-pend the MSB (the sign bit).
 
Reactions: shaiko

    shaiko

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Similar threads

Cookies are required to use this site. You must accept them to continue using the site. Learn more…