VHDL Round Robin Arbiter help

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tonionio

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Dear all..

I am currently trying to build a code for a round robin arbiter in VHDL. There will be 5 input requests that the arbiter will have to arbitrate with a given rotating order. The inputs will be of binary form zero or one. So if for exaple the RRA has 01010 inputs with the right bit being the msb for the arbitration. Now as we can see the msb is '0' so if it is its turn to win the arbitration the arbiter will go to the next bit to see if it is '0' or '1'. In our case it is so it will arbitrate the second bit and then so on...

Any ideas how could I write a code for this one?

with regards
 

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