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VHDL process statement in hardware

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eldood

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How are VHDL process statements implemented in hardware? For example if I have something like:

a <= b;
a <= c;

in a process, will this be resolved in the synthesizer before it is implemented in hardware, or is this somehow implemented with hardware logic gates?
 

Im not sure why it should be resolved since 'a' has only one driver. However im also interested in the part about logic gates.
 

Within a process, the last nonblocking assign reached in a normal top-to-bottom reading of the process is the one that will be used to update the signal. The update still occurs after all affected processes have been evaluated.

This is commonly used to initialize values:
x <= default_x;
if (y = '1') then
x <= '1';
...

This makes more sense when x is assigned a default value in many cases. Without careful use, this feature will infer a priority structure that is more difficult to analyze because the different cases are spread out across the code. This can sometimes result in poor performance (area/speed). This feature also hides this potentially complex priority structure from the user, which can make the code easier to read.

In your example, the result would be just a <= c. For the most part, I only see this feature used to initialize values at the top of a process. It can also be used for resets (eg, when placed at the bottom of the process), if the synthesis tool allows for it.


edit -- for other designs, VHDL provides "resolution functions", which allow multiple drivers in a user defined manner. This is most commonly used for 3-state busses, where the bus might be driven to '1' by one driver, and driven to 'z' by the other. Such would be resolved to 1. wired-and, and wired-or are also common resolution functions. It can be used to _model_ things like i2c busses, where the bus will resolve to '0' if any driver has a value of '0'. I don't think this feature is synthesizable with any/all tools.
 
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