VHDL modulo 2^64 addition

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MSAKARIM

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I'm working on SHA-512 VHDL implementation and i need to perform (addition mod 2^64)

How can i make the following addition as (modulo 2^64 addition)

Code: 
  a(i)          <= std_logic_vector(unsigned(h(i-1)) +unsigned(f3(i)) + unsigned(f0(i)) +unsigned(k(i)) + unsigned(w(i))  + unsigned(f2(i)) + unsigned(f1(i)));
 

Hi,
I noticed that you used this: std_logic_vector(unsigned(h(i-1))

Why not try this: std_logic_vector(unsigned(h(i)-1)

I don't quite understand what you're doing though but if you show your code, then I can follow.
 
Hi,

Signed or unsigned values?

Klaus
 

KlausST said:
Hi,

Signed or unsigned values?

Klaus
Click to expand...

Since every quantity in the equation is specified as unsigned, then surely it's unsigned ?

Also, I did not understand the symbol " <= ". Is this a qualifier equation or is it an inequality ??
 

Hi,

Since every quantity in the equation is specified as unsigned, then surely it's unsigned ?
Click to expand...
For sure you are right. ... I should have been more concentrated when reading post#1.

Klaus
 

Akanimo said:
Hi,
I noticed that you used this: std_logic_vector(unsigned(h(i-1))

Why not try this: std_logic_vector(unsigned(h(i)-1)

I don't quite understand what you're doing though but if you show your code, then I can follow.
Click to expand...

h(i-1) is a previous iteration for h ( NOT h(i)-1 )
 

The code shown looks correct for this problem. My guess is that one or more of the terms is incorrect.

For any encryption core, you really need to get detailed test vectors. Not just input and final output, but all intermediate terms for every iteration. when everything looks random by design it is harder to intuitively trace the problem to a source.
 

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