VHDL MOD-5 counter with specal sequence

Status
Not open for further replies.

hfbroady

Newbie level 5
Joined
Dec 4, 2010
Messages
10
Helped
3
Reputation
6
Reaction score
3
Trophy points
1,283
Location
Rochester,NY,USA
Activity points
1,343
I trying to write a MOD-5 counter that counts like this 000,001,010,110,111,000. This is what I have so far. When I simulate the code this is the count I get 000,001,010,011,100,101,110,111,000. Not sure why the simulation goes to 5. Here is the code.
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;

ENTITY mod5 Is
PORT( CLK,CLR:IN BIT;
QOUT:BUFFER INTEGER RANGE 0 to 7);
END mod5;

ARCHITECTURE arc OF mod5 is
BEGIN
PROCESS (CLK,CLR)
BEGIN

IF (CLK'EVENT and CLK='1') THEN
QOUT<=QOUT +1;
IF (QOUT=2) THEN
QOUT<=6;
QOUT<=QOUT + 1;

END IF;
END IF;
END PROCESS;
END arc;
 

Qout <= 6; Qout <= Qout+1;

keep in mind that nonblocking assigns are not performed until after the process has been fully evaluated. thus, the above will evaluate to: Qout <= Qout+1;. This is because ONLY the last nonblocking assignment is used. the Qout <= 6; is ignored -- the Qout <= Qout + 1; statement follows it in all cases.

you want "if Qout = 2 then Qout <= 6; else Qout <= Qout +1; end if;"

and for sanity, you want to name the module something other than "mod5". as x%5 = 7 is no what anyone would expect!
 

Thanks I will remove the QOUT <=QOUT +1;...I need the program to count like this 000,001,010,110,111,000. I will keep playing with it. Thanks
 

Status
Not open for further replies.

Similar threads

Cookies are required to use this site. You must accept them to continue using the site. Learn more…