VHDL in Xilinx - type conversion

[childs]

vhdl to_integer

I had just switch to Xilinx ISE from Quartus recently, somehow my old old with type conversion such as :

data_out <= "0000000000" & std_logic_vector(eod + "1");
(error: Expression in type conversion to std_logic_vector has 2 possible definitions in this scope, for example, UNSIGNED and std_logic_vector.)

memory(to_integer(pointer)) := data_in;
(error: to_integer can not have such operands in this context.)

cannot be compiled in Xilinx... may i know how to do such type conversion in Xilinx? Is there any different in syntax or whatever??

 

[atena]

to_integer vhdl

Firstly in VHDL std_logic_vector is one data types declaration, so i suggest you to change the name of your function in 1st line.

The second line, the problem may be with the return value data type of either function to_integer or memory, you please check it again to ensure that they are compatible.

 

[shnain]

vhdl data type conversion

Hi,

Try the enclosed sheet, it's really usefull !

Hope it helps,
Said.

 

[FvM]

conversion type like to_integer in vhdl

The argument of the type cast std_logic_vector(eod + "1"); is basically ambiguous cause "1" has no clear type, if it has been accepted by Quartus, this has been only by chance to my opinion.

 

[childs]

xilinxtype

I had just solved this problem, it was due to d Xilinx ISE template had included library of IEEE.STD_LOGIC_ARITH & IEEE.STD_LOGIC_UNSIGNED, n I just add the library i used normally (IEEE.NUMERIC_STD) behind them. It works well if i deleted that 2 libraries, which i didn't use before this.

Thx

 

[blah_blah_blah]

bump... that pdf was wicked useful