Hello all,
Take the following for example
Code VHDL - [expand] |
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| type t is (a, b, c, d, e);
subtype s is t range D downto B; |
Therefore the following should be true.
Code:
s'left = D
s'right = B
t'ascending = true
s'ascending = false
How does one get the attributes reported out to the screen?
report " some comment regarding attribute ... 'string', 'image' ";
I want to find out how I can get the range of a bespoke data type? How to I pump it out to the screen?
How can I prevent constraining my loop to static (0 to 3) or generic (base to top)?
I want to maximise the attribute functionality.
Code VHDL - [expand] |
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| type row_array_t is array(0 to 3) of BYTE_T;
type matrix4x4_t is array (0 to 3) of row_array_t; -- alternatively col_array_t
--
for i in matrix_in(row)'range loop
for j in matrix_in(col)'range loop
matrix_out(i)(j) <= sub_byte_s_box1(matrix_in(i)(j));
end loop;
end loop; |
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So I've discovered I can do something like the following
Code VHDL - [expand] |
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| type tVecVecByte is array (natural range <>, natural range <>) of
std_logic_vector(7 downto 0);
signal matrix_in is tvecvecByte(0 to 3, 0 to 3);
--Therefore
for I in matrix_in'range(1) loop
for I in matrix_in'range(2) loop. |
Why it's not 0 and 1 ...I don't know.
Anyway, I still need help with reporting the attributes to the console window.
Regards