VHDL for CPLD Code for Button On Release Enable

[JoK3r]

enable vhdl

Hi ALL,

I am new to this forum and I am in need of a big hand of help here.

How do I make my VHDL Codes to execute ONLY when an 'enter' button is pressed and released i.e. not pressed all the time?

So the enter button would work 'like' a reset button, except that the button enables my codes to be executed.

I know I just can't simple write something like

if enter = '0' then
bla bla bla..
end if;

as then enter would change from 1 to 0 to 1 (Active Low Logic) when the button is pressed, thus disabling code execution at the next clock cycle.

Will somebody be able to help me with this?

Thanks in advance

 

[Marcel Majoor]

cpld code

You have to detect a change of the key so we need a register which holds the old state of the key:

  signal PreviousKey: std_logic;

I assume there is also a signal which has the current state of the key (could be the direct 'hardware' key, or a debounced state of it):

  signal CurrentKey: std_logic;

And then in a process we check if the key has changed:

process (clk)
begin
  if rising_edge(clk) then
    -- Check if the key has changed
    if (CurrentKey != PreviousKey) then
      -- The key has changed; check for press or release
      if (CurrentKey = '0') then
        -- The key has been released ...
      else
        -- The key has been pressed ...
      end if;
    end if;
    -- Record the current state (so we can detect a change)
    PreviousKey <= CurrentKey;
  end if;
end process;

Note: This code has not been (syntax) checked by any means so keep that in mind.