VHDL concatenation operator (&) with INTEGER type

omara007 · Dec 23, 2008

vhdl concatenation

hi guys

how to concatenate integer elements the same way std/bit elements are concatenated using (&) ? .. given that (&) doesn't work with integers

omara007 · May 2, 2009

concatenation in vhdl

Any idea ?

Marcel Majoor · May 2, 2009

concatenation operator in vhdl

If you convert the integer to a vector then you can do it, like the following example shows:

Code:

signal   test    : std_logic_vector(31 downto 0);
constant inttest1: integer := 1234;
constant inttest2: integer := 1234;


  -- conv_std_logic_vector(number, nr_of_bits)
  test <= conv_std_logic_vector(inttest1, 16) & conv_std_logic_vector(inttest2, 16);

vipinlal · Mar 26, 2010

general uses of concatenation operator is explained here..
https://vhdlguru.blogspot.com/2010/03/concatenation-operator-in-vhdl.html

VHDL concatenation operator (&) with INTEGER type

omara007

Advanced Member level 4

omara007

Advanced Member level 4

Marcel Majoor

Full Member level 2

vipinlal

Full Member level 6

Similar threads

VHDL concatenation operator (&) with INTEGER type

omara007

Advanced Member level 4

omara007

Advanced Member level 4

Marcel Majoor

Full Member level 2

vipinlal

Full Member level 6

Similar threads

Privacy & Transparency

Privacy & Transparency