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VHDL code for BPSK modulator/Demodulator

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draz

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Hi

Can someone please help me with the VHDL code for BPSK modulator/Demodulator ?

I need this urgently for my Project


Thanks
 

vhdl code for bpsk

try this verilog code


Modulator:-
always @(MOD_IN) begin
MOD_OUT_Q = 'd0;
if(MOD_IN) MOD_OUT_I = 'h3; (-1)
else MOD_OUT_I = 'h1; (+1)
end

De_Mod:-
always @(MOD_OUT_I or MOD_OUT_Q) begin
case({MOD_OUT_I,MOD_OUT_Q})
4'b1100: DEMOD_OUT = 1;
4'b0100: DEMOD_OUT = 0;
endcase
end
 

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