shaiko
Advanced Member level 5
This is my asynchronous code for a signal rise/fall detector.
The problem is obvious - the change signal will be as short as the combinatorial delay of the transperant latch + comparator.
Any suggestions about how to make the "change" signal wider ?
------------------------------------------------------------------------
entity change_detector is
port
(
rst ,
input : in std_logic
change : out std_logic
) ;
end entity;
architecture rtl_change_detector of change_detector is
signal latched_input : std_logic ;
begin
change <= '1' when latched_input /= input else '0' ;
process ( change , rst ) is
begin
if rst = '1' then
latched_input <= '0' ;
elsif change = '1' then
latched_input <= input ;
end if ;
end process ;
end architecture rtl_change_detector ;
------------------------------------------------------------------------
The problem is obvious - the change signal will be as short as the combinatorial delay of the transperant latch + comparator.
Any suggestions about how to make the "change" signal wider ?
------------------------------------------------------------------------
entity change_detector is
port
(
rst ,
input : in std_logic
change : out std_logic
) ;
end entity;
architecture rtl_change_detector of change_detector is
signal latched_input : std_logic ;
begin
change <= '1' when latched_input /= input else '0' ;
process ( change , rst ) is
begin
if rst = '1' then
latched_input <= '0' ;
elsif change = '1' then
latched_input <= input ;
end if ;
end process ;
end architecture rtl_change_detector ;
------------------------------------------------------------------------