ahmad_abdulghany
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scorrpeio said:To make "delay" of few nano to milli second u can use "WAIT" statement. There r three types in it
WAIT ON<signal name>
WAIT UNTIL<boollean exp>
WAIT FOR<time in nano sec>.
Hope this will clear ur doubt
welcoming comments
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY clk2 IS
PORT (
clk : IN STD_LOGIC;
clkkj : OUT STD_LOGIC);
END clk2;
ARCHITECTURE a OF clk2 IS
BEGIN
PROCESS (clk)
VARIABLE cnt : INTEGER RANGE 0 TO 4096;
BEGIN
IF (clk'EVENT AND clk = '1') THEN
cnt := cnt + 1;
END IF;
IF (cnt >= 2048) THEN
clkkj <= '1' ;
elsif (cnt >=4096) then
cnt := 0 ;
ELSif (cnt <= 2047) then
clkkj <= '0';
END IF;
END PROCESS;
END a;
leoren_tm said:hirs my code for a delay clock..
if you could see it...Code:LIBRARY ieee; USE ieee.std_logic_1164.ALL; ENTITY clk2 IS PORT ( clk : IN STD_LOGIC; clkkj : OUT STD_LOGIC); END clk2; ARCHITECTURE a OF clk2 IS BEGIN PROCESS (clk) VARIABLE cnt : INTEGER RANGE 0 TO 4096; BEGIN IF (clk'EVENT AND clk = '1') THEN cnt := cnt + 1; END IF; IF (cnt >= 2048) THEN clkkj <= '1' ; elsif (cnt >=4096) then cnt := 0 ; ELSif (cnt <= 2047) then clkkj <= '0'; END IF; END PROCESS; END a;
for 4096/2 a pulse is genarated...
this represent a delay for a 25Mhz which is a clock on a xinlinx spartan3
a default clock.
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