imar
Full Member level 1
hi freinds,
1- i am trying to achieve a system level design for a rf receiver that has freq range between 100 MHz to 900 MHz.
i am confused on the what way that i should use to fixe the output level of the VGA before coming to the ADC.
what are approximtly the power level accepted by the ADC?
is it always around 15 dBm which corresponds to 1.2 V rms; or it could be lower and even reaches some negative values (less than -5 dBm) ?
i didn't fixe yet the kind of ADC , it would be 9 bits with fsamp of 100Msps.
2-an other question please: is there any helpful reference that explains VGA, especially, what is the max of IIP3 that could reache the VGA?
3-what is the max of IIP3 that could reache an amplifier for gain >20 dB?
i appreciate any help
thanks in advance
imar
1- i am trying to achieve a system level design for a rf receiver that has freq range between 100 MHz to 900 MHz.
i am confused on the what way that i should use to fixe the output level of the VGA before coming to the ADC.
what are approximtly the power level accepted by the ADC?
is it always around 15 dBm which corresponds to 1.2 V rms; or it could be lower and even reaches some negative values (less than -5 dBm) ?
i didn't fixe yet the kind of ADC , it would be 9 bits with fsamp of 100Msps.
2-an other question please: is there any helpful reference that explains VGA, especially, what is the max of IIP3 that could reache the VGA?
3-what is the max of IIP3 that could reache an amplifier for gain >20 dB?
i appreciate any help
thanks in advance
imar