lahrach
Full Member level 3
Hi friends,
what is the difference betwenn these two statements;
1- std_logic;
2- std_logic_vector(0 downto 0);
I found this in Core Generator when creating a BRAM
regards;
what is the difference betwenn these two statements;
1- std_logic;
2- std_logic_vector(0 downto 0);
I found this in Core Generator when creating a BRAM
regards;