VERILOG: Fixed point library

[FPGAdevel]

Hi. I need to use fixed point numbers in my Verilog module and i looking for some special libraries for that. I have found one but its VHDL lib. Can you guys help me with that please.

 

[Syswip]

Could you please explain a little bit more what kind library you need?

Tiksan,

 

[FPGAdevel]

I wrote program for ACTEL FPGA using Libero IDE with verilog language. I was using in this program real variables that Synplify synthesiser not compiling. I need to substitute that kind of vars with vars defined thru reg or wire types.