Verilog equivalent of others

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checkmate

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verilog others equivalent

Is there a verilog equivalent of the following vhdl code?
Code:
A <= (others => 'z')
 

verilog equivalent of others

Here is the equivalent code in verilog

Code:
`define SIZE_OF_A 64

A <= {`SIZE_OF_A {1'bz}};

if  SIZE_OF_A is less than or equal to 32 you can
directly write

A <= 'bz;

Hope this helps!
 

    checkmate

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verilog others equivalent

`define SIZE_OF_A 64

A <= {`SIZE_OF_A {1'bz}};

if SIZE_OF_A is less than or equal to 32 you can
directly write

A <= 'bz;
Here is a simpler code:
Code:
A <= 'b Z //verilog automatically extends the RHS to the LHS size.

New verilog standards supports extension to 64 bits.

Regards,
Amr.
 

    checkmate

    Points: 2
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