Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Verilog-a code for 8-3 priority encoder

Status
Not open for further replies.

Engineer4ever

Member level 3
Joined
Feb 2, 2013
Messages
67
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,288
Activity points
1,748
Hi,

I am trying to design 64-6 priority encoder using verilog-a, so I started writing a code for 8-3 priority encoder for practicing as I am new to verilog-a. I tried the following code but there is a syntax error in "code=3'b000" line. How can I assign the the output of the encoder?

Code:
module priorityencoder (sel, code);
input [0:7] sel;
output [0:2] code;
electrical [0:7] sel;
electrical [0:2] code;

analog begin

if (sel[0]) begin
code=3'b000;
end 

else if (sel[1]) begin
.
.
.
.
.
endmodule


Thanks,
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top