Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Verification Methodology - request for resources

Status
Not open for further replies.

dexter_ex_2ks

Member level 1
Joined
Jun 19, 2006
Messages
32
Helped
1
Reputation
6
Reaction score
0
Trophy points
1,286
Location
Romania
Activity points
1,549
Verification Methodology

Hi all, I'm new in this domain, so my question is where can I find some documentation about Verification Methodology (for the moment,regarding Functional verification and Formal verification). And I need some examples too.

Thanks in advance,
and
Have a nice day !
 

Re: Verification Methodology

so you can find it in this bbs! OVM or VMM!
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top