Verification for an LUT

[kaushikrvs]

what are the tests that have to be done for verifying an LUT and making it errorfree?
I am asking what all various parameters should be used in testbench(Verilog) to find the errors ?

 

[ThisIsNotSam]

You are asking us to summarise a huge area. Verification is very complex once you move from academic toy examples. Look into coverage and verification methodologies for starters.