Verification Challenges and Approaches in SoC designs

[aloksanghavi]

What are the current challenges with formal verification? What is your experience (if any) using it for applications other than block level verification such as early RTL exploration, post-silicon validation, design & IP re-use as well as standard protocol certification (eg. AXI, AMBA, PCI-Express, etc.)

 

[ljxpjpjljx]

now the soc become more large, the challenges is when is the verification goal ok?