Vds will never match in this case since in replica leg, you just have one PMOS transistor. If you really want vds to match, add replica NMOS in replica circuit. The pupose of the replica circuit is two fold:
1. To track any variations. If there are any current/power supply variations, replica circuit and error correction opamp will pull biasing point to stable values set by Vref
2. To set output swing. Lowest value on X,Y will be Vref. Hence max swing you can have at output of this circuit is vdd to vdd-vref.
For faster speed, you will like to use smaller swing and keep devices into linear region. To keep PMOS in linear region, you need to set vref at least equal to vdsat of M1,M2 and current source. ISS,I1 can be same or you can scale current I1 and PMOS M5 by same factor.
Hope this helps.