VCO+Divider Chain simulation

[haadi20]

output impedance pss pac

I am using Spectre RF to simulate a VCO followed by a divide chain but it is painstakingly slow.

Initially, I had two separate designs:
1. 40GHz VCO followed by divide-by-2 ILFD (Generating 20 GHz output)
2. Divide by 16 based on DFF's

Both of these designs are working fine separately, but when i tried to simulate them in together with the output of first design connected as input to the second, the transient simulation takes very small steps (eg: few ampto secs) each time....

Is there a solution or a workaround? Can i save the output of the first design in such a way that it can be used as a source in the second design ?

Any comments/suggestions would be welcome..!!

 

[jecyhale]

qpss autonomous analysis

Use buffer to drive.

 

[khouly]

qpss large circuits

it can be done , but this will not include the loading between two stages

i am not experinced with cadence , but try the PSS not transient

but it can be done in ADS using the new HB engine

khouly

 

[BigBoss]

divider chain

Use QPSS..
There are some convergence problems therefore simulator can not find a solution and decrease min. time step.
Because when you divide a signal and so, you'll get 2 or more carrier and PSS can not seperate these signals..( see Spectre RF Theory-Newton Shooting method)

You should either QPSS or transient and then DFT...

 

[pancho_hideboo]

I am using Spectre RF to simulate a VCO followed by a divide chain but it is painstakingly slow.
Initially, I had two separate designs:
1. 40GHz VCO followed by divide-by-2 ILFD (Generating 20 GHz output)
2. Divide by 16 based on DFF's
Both of these designs are working fine separately, but when i tried to simulate them in together with the output of first design connected as input to the second, the transient simulation takes very small steps (eg: few ampto secs) each time....

Even if you use HB or Shooting 1 Tone(1.25GHz) PSS, it takes very long time for simulation since very large frequency divide ratio, 32 is involved in your circuits.
Also you can't apply 2 Tone HB or Shooting such as QPSS due to principle of QPSS. Since 40GHz=2*16*1.25GHz, you can't choose 40GHz and 1.25GHz as 2 Tone in QPSS setting.

Is there a solution or a workaround? Can i save the output of the first design in such a way that it can be used as a source in the second design ?

Yes, you can do.
(1) Evaluate input impedance of Divide by 16 based on DFF's
Here it is prefereable to do PSS, but AC analysis might be enough.
(2) Evaluate output signal and output impedance of 40GHz VCO followed by divide-by-2 ILFD with load evaluated in (1)
Here you have to do Autonomous PSS for oscillation and PAC for output impedance evaluation.
(3)Apply results of (2) into ppwlf component.
You can scale or adjust period and amplitude.