Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

VCO design and measurement

Status
Not open for further replies.

STOIKOV

Full Member level 4
Full Member level 4
Joined
Nov 18, 2005
Messages
236
Helped
8
Reputation
16
Reaction score
2
Trophy points
1,298
Activity points
3,083
hello! I designed a ring vco, simulated and did its layout. Then I simulate the extracted circuit (LEdit) and simulated again to obtain a frequency against control voltage curve. So the chip was fabricated and the experimental results show that the oscillation frequency is about 15 or 20% above the simulation frequency.

I hoped to obtain in lab a frequency below the simulated, maybe due to other parasitics not considered, but the frequency measured is larger.

Is this a normal behavior ? How can I justificate this percent of error. I was thinking on process variations, what do you think ?
 

jfyan

Full Member level 2
Full Member level 2
Joined
May 3, 2006
Messages
145
Helped
26
Reputation
52
Reaction score
4
Trophy points
1,298
Location
shanghai,china
Activity points
2,064
STOIKOV said:
hello! I designed a ring vco, simulated and did its layout. Then I simulate the extracted circuit (LEdit) and simulated again to obtain a frequency against control voltage curve. So the chip was fabricated and the experimental results show that the oscillation frequency is about 15 or 20% above the simulation frequency.

I hoped to obtain in lab a frequency below the simulated, maybe due to other parasitics not considered, but the frequency measured is larger.

Is this a normal behavior ? How can I justificate this percent of error. I was thinking on process variations, what do you think ?
hi,
maybe it is a fast process. and you can check the ckt by simulating the ring osc ckt in fast corner.

good luck
jeff
 

    STOIKOV

    Points: 2
    Helpful Answer Positive Rating

STOIKOV

Full Member level 4
Full Member level 4
Joined
Nov 18, 2005
Messages
236
Helped
8
Reputation
16
Reaction score
2
Trophy points
1,298
Activity points
3,083
what means simulate in "fast corner" ?
 

STOIKOV

Full Member level 4
Full Member level 4
Joined
Nov 18, 2005
Messages
236
Helped
8
Reputation
16
Reaction score
2
Trophy points
1,298
Activity points
3,083
I'm using a Mosis process, the fast model is a simulator option or a complete model like level=49 that currently am using ?
 

isaacnewton

Full Member level 2
Full Member level 2
Joined
May 13, 2004
Messages
143
Helped
12
Reputation
24
Reaction score
8
Trophy points
1,298
Location
Earth Village
Activity points
1,134
It's a complete model.

STOIKOV said:
I'm using a Mosis process, the fast model is a simulator option or a complete model like level=49 that currently am using ?
 

    STOIKOV

    Points: 2
    Helpful Answer Positive Rating

henryhd

Junior Member level 3
Junior Member level 3
Joined
May 31, 2006
Messages
26
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,283
Location
China
Activity points
1,412
I want design a ring oscillator,can you provide me some tutorial by ADS. and i want to know how can i builde the MOS component i need,and my operated frequency is about 5GHz!thank you!
 

ahmad_abdulghany

Advanced Member level 4
Advanced Member level 4
Joined
Apr 12, 2005
Messages
1,206
Helped
102
Reputation
206
Reaction score
22
Trophy points
1,318
Location
San Jose, California, USA
Activity points
11,769
henryhd said:
I want design a ring oscillator,can you provide me some tutorial by ADS. and i want to know how can i builde the MOS component i need,and my operated frequency is about 5GHz!thank you!

I think that there're built-in samples for ring osc in ADS.. look for them..
 

henryhd

Junior Member level 3
Junior Member level 3
Joined
May 31, 2006
Messages
26
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,283
Location
China
Activity points
1,412
thank you and i'll try it !
 

qslazio

Full Member level 3
Full Member level 3
Joined
May 23, 2004
Messages
175
Helped
18
Reputation
36
Reaction score
7
Trophy points
1,298
Activity points
1,420
STOIKOV said:
hello! I designed a ring vco, simulated and did its layout. Then I simulate the extracted circuit (LEdit) and simulated again to obtain a frequency against control voltage curve. So the chip was fabricated and the experimental results show that the oscillation frequency is about 15 or 20% above the simulation frequency.

I hoped to obtain in lab a frequency below the simulated, maybe due to other parasitics not considered, but the frequency measured is larger.

Is this a normal behavior ? How can I justificate this percent of error. I was thinking on process variations, what do you think ?

take a look at the temperature difference between simulation and silicon.
vco frequency is sensitive to temperature.
 

    STOIKOV

    Points: 2
    Helpful Answer Positive Rating

evilguy

Full Member level 4
Full Member level 4
Joined
Sep 21, 2005
Messages
206
Helped
21
Reputation
42
Reaction score
8
Trophy points
1,298
Activity points
2,768
that your layout is well match?
 

    STOIKOV

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top