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Using for-loop Generate index for indexing array

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SharpWeapon

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Hello,

I use For-Generate to connect modules. For each index of the For-Generate, I want to write the output to file using the index of the For-Generate:
Code:
type arr is array(1 to n) of STD_LOGIC_VECTOR(4 downto 0);
	signal AReal: arr; 
....
for i in 1 to n generate
...
tofile: process(CLK)
   file outFile: text is out "~\result.txt";
   variable outline: line;
begin
	if(CLK'event and CLK='1') then 
		if(en='1') then 
			write(outline, AReal(i));
			writeline(outFile, outline);
		end if;
	end if;
end process;

But I got "write expects 2 arguments" and "Type void is not an array type and cannot be indexed" errors on the line "write(outline, AReal(i));". Is there an easy way to do this?

Thanks!
 

can you post the full code please... you missed your library includes. did you include ieee.std_logic_textio.all?

And do you mean to use VHDL 87 syntax? the '93 syntax is:

file outfile : text open write_mode is "~\result.txt";
 
Hey, Thank you. I included, library std; use std.textio.all; It is working with it now. But out of curiosity, when I remove this one and include ieee.std_logic_textio.all; All the text related types like line, text and all goes undeclared. why?

Another unrelated question, I tried to concatenate strings and write to the file this way:
Code:
variable data: string:= integer'image(to_integer(signed(AReal(i)))) & "ht" & integer'image(to_integer(signed(AImg(i))));

But I have "found '0' definitions of operator "&" ".
Again out of interest, I tried to use to_string() function to cast integer to string, it doesn't seem to work, the compiler replied undeclared. Have you ever used it? Thanks!
 

text file type is declared in std.textio. Std_logic_textio allows you to write std_logic_vectors to text files (you will need to included std.textio to acutally use std_logic_textio).

You still didnt post your whole code - so I still cannot help with the origional post.

As for your concats - I assume this isnt the origional code, as there are a couple of issues:
1. It has no length defined for the string type.
2. "ht" is the string ht, not a hard tab. Hard tab is HT

to_String exists for all base types in VHDL 2008. so it doesnt exist in VHDL 93. With VHDL 2008, the base libraries contain all of the textio functions for all the base types. So std_logic_textio is not needed (as the functions are included in std_logic_1164).
 
Thanks a lot buddy for the explanation. I did the correction to the code, length and hard tab thing. I still have the same error.
Code:
process(CLK)
	file outfile : text open write_mode is "~\result.txt";
	variable outline: line;			
	variable data: string(1 to 20):= integer'image(to_integer(signed(AReal(i))))&"HT"&integer'image(to_integer(signed(AImg(i))));
begin
	if(CLK'event and CLK='1') then 
		if(en='1') then 
			write(outline,data);
			writeline(outfile, outline);
		end if;
	end if;
end process;

I can't always count the size of the string, can't I make a variable length?
 
Last edited:

"HT" is a string, not a tab character. You need

integer'image(to_integer(signed(AReal(i))))& HT &integer'image(to_integer(signed(AImg(i))));

note the lack of quotes around HT. "HT" is a string. HT is a tab

You still havent posted the whole code - this is just a single process. As data is never changed, and will always write the same thing, a load of UUUUUU (unless you initialised AReal and AImg to something).

No you cannot have a variable length string.
But you could use a line instead (the line type is just a pointer to a string). THis way, you can just allocate a new line:

data := new string'("Hello world!");
 
I did the correction, still same. :( "found '0' definitions of operator "&" ". But it should have concatenated anyway as a string right?

The data will have some value, and the UUU staff is not a problem, don't worry about it.
 

I cant help you with the '0' definitions error until you post the whole code.......
So please post the code.
 

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