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Using D flip flop as Component

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cruzer111

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Hi, im new to vhdl. I want to implement the following attached diagram using two D flip-flops.
However, im unable to successfully synthesize the code. I've added the errors in the attached code file. Please mention where im going wrong.
 

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Bunches of errors, which the error messages are pretty clear about.

1) You haven't declared signals a,b,c or d or clk
2) You didn't terminate your lines ("j<=not a"...) with a semicolon.
 

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