using acceldsp and matlab to store variable in ROM

[mimiza]

Hello,
I'm using acceldsp to convert a file.m to vhdl. I write this code on matlab:
function Y=addto(P,z)
switch(z)
case(1)
X=P+3;
Y=P;
case(0)
Y=X+P;
end
end

I will use the case z=1 only once time,after that I want to store X in ROM memory.
Can any one tel me how to do that.
Thanks

 

[gongdori]

Haven't used Acel DSP myself, so I cannot help on that. But, it is not that hard to create a ROM in VHDL.
Below is coding template in VHDL I found in ISE.
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity rams_21b is
port (CLK : in std_logic;
EN : in std_logic;
ADDR : in std_logic_vector(5 downto 0);
DATA : out std_logic_vector(19 downto 0));
end rams_21b;

architecture syn of rams_21b is
type rom_type is array (63 downto 0) of std_logic_vector (19 downto 0);
signal ROM : rom_type:= (X"0200A", X"00300", X"08101", X"04000", X"08601", X"0233A",
X"00300", X"08602", X"02310", X"0203B", X"08300", X"04002",
X"08201", X"00500", X"04001", X"02500", X"00340", X"00241",
X"04002", X"08300", X"08201", X"00500", X"08101", X"00602",
X"04003", X"0241E", X"00301", X"00102", X"02122", X"02021",
X"00301", X"00102", X"02222", X"04001", X"00342", X"0232B",
X"00900", X"00302", X"00102", X"04002", X"00900", X"08201",
X"02023", X"00303", X"02433", X"00301", X"04004", X"00301",
X"00102", X"02137", X"02036", X"00301", X"00102", X"02237",
X"04004", X"00304", X"04040", X"02500", X"02500", X"02500",
X"0030D", X"02341", X"08201", X"0400D");

signal rdata : std_logic_vector(19 downto 0);
begin

rdata <= ROM(conv_integer(ADDR));

process (CLK)
begin
if (CLK'event and CLK = '1') then
if (EN = '1') then
DATA <= rdata;
end if;
end if;
end process;

end syn;


Also, you can use CoreGen to do so.

 

[mimiza]

Thank you gongdori.