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Use vhdl and verilog ensemble

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jackobian

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IF I have fft verilog code full project for sound spectrum. and can i use it with vhdl source file project.i.e: use both vhdl ad verilog together in the same project
 

Yes, but you will need a mixed mode simulator to run any simulations of the entire design. Xilinx's isim and xsim support mixed mode simulation. Altera edition of Modelsim AFAIK does too. Regular Modelsim requires a mixed mode license.
 
thanks for reply. if i do compilation can i also download it to fpga de2-70 or any fpga kit.
 

thanks for reply. if i do compilation can i also download it to fpga de2-70 or any fpga kit.
FPGA "Compilation" is device specific. if you synthesize your code for one FPGA you won't be able to simply use the same programming file on another device. You'll have to rebuild the project around the new FPGA.

Regarding the VHDL / Verilog source files - you should be able to port them from one device to another successfully. But beware of possible differences in logic implementation that can have impact timing performance and resource usage.
 
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