atmega8515 external memory
HDCT said:
It seem that there isn't any problem with timing.
The fastest read access time for Atmel AT28C256 is 150ns.
The access time cannot exceed the time from the ALE pulse is asserted low until data must be stable during a read sequence (tLLRL+ tRLRH - tDVRH in Table 98 to Table 105 on page 202 of data sheet).
With 16MHz (tCLCL = 62.5ns) XTAL clock applied to ATmega8515 you need two wait states in order to not violate the specs of AT28C256.
Assuming you use the Lower Sector of the External memory address space, you must set bit 3 (SRW01) and clear the bit 2 (SRW00) of EMCUCR register.
Obvious to enable the XMEM interface you need to set bit 7 (SRE) of MCUCR register.
Since you use 32K external memory space and address bit A15 isn't connected to the external memory, you can still have access to the first 608 bytes (external memory addresses 0x0000 to 0x025F) by addressing from 0x8000 to 0x825F.
If you don't want that, you can released the bit 7 of port C for normal port pin function by setting bit 3 (XMM0) and clear bit 4 (XMM1) and bit 5 (XMM2) of SFIOR register.
Use the 74AC573 latch not 74HC573.