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USB Voltage Sense Circuit Question

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Sink0

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Not sure if is the right place to make question about this. I am designing a board using USB1T11A and a Cyclone IV FPGA. As the OpenRISC board got a similar circuit to what i am looking for i am trying to understan their schematic. However looking at page 18 of the SCHEMATIC there is a NPN transistor to implement the VUSB sense. The VSENSE is connected to a PIN of the FPGA and probably using one o the internal pull-ups. Is it a good practice to tie the transistor GATE direct to the voltage you want to monitor? Should i add a series resistor and maybe a pull-down. The FPGA pull-up is tied to 3.3V, any problem with that as the gat voltage will be 5V? As i know of transistors not, but checking does not hurt.

Best regards,

LR
 

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