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USB 2.0 -- Anybody actually implement it using the OpenCores IP?

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NVergunst

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I am looking for a way to implement HS USB 2.0 (480mbps) on an FPGA. I have looked at the OpenCores solution but am slightly confused. The SVN has been updated within the past year, but the "status" has not changed in forever.

I am just wondering if anybody has any experience with this core and if it functions somewhat ok?

I want to build some test hardare using an FPGA and a UTMI PHY chip and just get 512byte bulk transfers going. I currently use microprocessors using full speed at 12mbps transfering 64byte blocks but USB is my bottleneck at these speeds. I want to make the leap, but with somewhat of a cushion there if need be! Also the reason for not going with the Cypress parts is just cost. At $15/each, and then $8+/each in high quantities it is just not economically feasible.
 

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