saqib.shah06
Junior Member level 2
Hi everyone,
I need to compile a cordic core and simulate it in vhdl. I am using MODELSIM. I have the codes attached to this post.
Could someone tell me how to go about doing it?
I tried loading the fun_pkg.vhdl and cordic.vhd and then using a autogenerate compile order- i compiled both of them. Then I loaded the cordic_tb.vhd and compiled it. However after loading the waveforms, I get a very weird looking output with most signals in the "U" state.
Any help will be greatly appreciated!
I need to compile a cordic core and simulate it in vhdl. I am using MODELSIM. I have the codes attached to this post.
Could someone tell me how to go about doing it?
I tried loading the fun_pkg.vhdl and cordic.vhd and then using a autogenerate compile order- i compiled both of them. Then I loaded the cordic_tb.vhd and compiled it. However after loading the waveforms, I get a very weird looking output with most signals in the "U" state.
Any help will be greatly appreciated!