ОК,
What does this bit stand for? Could you tell me?
ОК,
What does this bit stand for? Could you tell me?
What does this bit stand for?
That may be true for a software implementation if you have difficulties to determine the exact frame end, but what should be the purpose of delaying DE? UARTs with built-in RS485 flow control usually don't delay the transmit enable beyond the stop bit, they however may assert DE before the start bit, FT232 e.g. does.The "Transmit Buffer Empty" Flag might be SET when the Last Byte is initially sent to the Shift-Out Register.
So then the software needs to DELAY as that byte is shifted out, PLUS a 1 or 2 "Bit Time" delay before changing DE to LOW.
Note that the TXDEN is activated 1 bit period before the start bit. TXDEN is deactivated at the same time
as the stop bit.
Useless considerations without referring to the protocol used by the devices, I think.Roughly, it may say that getting of distorted, unreadable Chars, as a variant of course, is a result of some kind of cutting, either it is start bit or stop bit, while transmission phase. Worse yet, it may be both cutted.
You know, both devices don't have any settings regarding mentioned above delaying. I can just imagine an answer of both manufactures regarding their firmware... "Our firmware is ok, it was tested!"
Useless considerations without referring to the protocol used by the devices, I think.
Are you reporting a specific problem? If so, please mention the relevant details.
If you are discussing the topic generally, please notice that half duplex communication can't work without a protocol followed by all involved devices. Industrial protocols like MODBUS have strict specifications of transmission timing, they can be implemented and verified straightforward.
That may be true for a software implementation if you have difficulties to determine the exact frame end, but what should be the purpose of delaying DE? UARTs with built-in RS485 flow control usually don't delay the transmit enable beyond the stop bit, they however may assert DE before the start bit, FT232 e.g. does.
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PIC 24/32 UART is generating a transmitter idle status bit (TRMT) which becomes valid after the stop bit. Hardware transmitter enable is operated according to TRMT, without additional delay.
Hello everyone,
Roughly, it may say that getting of distorted, unreadable Chars, as a variant of course, is a result of some kind of cutting, either it is start bit or stop bit, while transmission phase. Worse yet, it may be both cutted.
You know, both devices don't have any settings regarding mentioned above delaying. I can just imagine an answer of both manufactures regarding their firmware... "Our firmware is ok, it was tested!"
As far as I understand the delaying bits can be implemented via firmware changing only.
BR
You may need to get a Digital Scope and/or a Digital Analyzer connected to the RS-485 line to determine the root cause of this problem.
What hardware are you using?
What Software Protocol are you using?
This is a new install. Consider that as an experiment within a project.Did the RS-485 communications ever work properly, or is this a new install?
When does the bad comm happen?
a) When the Master sends a message to the Slave?
b) When the Slave replies to the Master?
c) Both ways ?
Do any packets get sent & received without comm errors ?
I´m designing industrial electronics and this statement can only be true on (propritary) full duplex peer to peer communications.I'm afraid, you are wrong. Many industrial devices communicate with each other and they are even not aware, that there are protocols at all, especially industrial.
The circuits I´ve seen use the RS232 control lines (usually RTS) to enable/disable the RS485 transmitter.Standalone RS232 to RS485 converters can't know where the end of the stop bit is, because the baudrate is unknown.
Hi,
I´m designing industrial electronics and this statement can only be true on (propritary) full duplex peer to peer communications.
All I´ve done so far was with a known protocol where all the communication is specified.
This leads me to some questions:
* are we talking about 2 pair (full duplex) or 1 pair (half duplex) interface?
* is it a peer to peer interface or a true (multiple salves) bus?
The circuits I´ve seen use the RS232 control lines (usually RTS) to enable/disable the RS485 transmitter.
I did some study on slave's PCB and can definetely say that DE and RE are connected together.
Klaus
This is a protocol.The slave just executes commands which are programmed in its firmware.
The circuits I´ve seen use the RS232 control lines (usually RTS) to enable/disable the RS485 transmitter.
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