Hi,
the question is not clear.
You are in the IC design section.
You have a master clock.
Then there usually is a clock divider to generate baud rate. Usually this is an integer divider.
So the baud rate = master_clock / int_value.
So basically there are just two things that determines the baud rate and it's error.
* input clock (variation)
* the error that the "integer" ( missing fractional part) brings.
To avoid both, one uses a stable, known master clock (XTAL)
And one uses a baud_rate_friendly master frequency.
The mathematical solution is via prime factorisation.
Example
Generating 115200 baud from a 4.0MHz clock
Divider = rounded(4,000,000 / 115,200) = rounded(34.7222) = 35
So the generated baud rate is 4,000,000 / 35 = 114,286 baud
A baud rate friendly input frequency = 3,6864,000 Hz
3,686,400 / 115,200 = 32.0000
For an IC designer this should be nothing new. Also written in any microcontroller documentation, every baud rate generator description ... and already has been discussed many thousand times...
Klaus