ua741 transistor level diagram, is this correct?

[snee]

transistor diagram

Can someone help me in this?
Thanks...

 

[umery2k75]

ua741 schematic

This Q35 is a dual emitter.Are you trying to say, you don't have dual emitter NPN in Pspice and you want to have this dual emitter NPN in Pspice. So you want to make this symbol?

Added after 3 minutes:

Ok, I get it, what do you want to say.
You have found 2 internal schematic of 741. Both of them are different, I'm sure both of them works, but why do you want to symbolize them. I don't remember about PSPICE, I think it already have 741 in it.If you don't find in it, go for another software like Multisim

 

[snee]

ua741 example

yeah i wish to get this symbol for use in PSpice.
Thank you very much for the reply umery...

 

[FvM]

circuit diagram of the ua741

I found this symbol in another ua741 op amp schematic but unfortunately i couldn't find this symbol in PSpice.

Simply assume two transistors.

 

[umery2k75]

ua741 specs

I have seen the National Semiconductor 741 IC diagram, it was same
I have also seen the SGS Thomson 741 IC diagram, it was also the same

Please upload the internal circuitry diagram.I can't find any difference between them.

 

[FvM]

ua741

Fairchild is giving a somewhat different circuit, e. g. involving the said dual-collector transistor. PSPICE LM741/uA741 models are b.t.w functional models, involving only two BJT at the input stage and controlled sources.

 

[snee]

internal diagram of op amp ua741

I use transistor level op amp of ua741 instead of the op amp ua741 available in PSpice so that i can get the changes in frequency response when i vary the temperature. That's my main reason and i really hope it works.

Btw i don't understand what FvM means by assume two transistors? means i'll need to use two bjt to represent that dual collector bjt?

Thanks to everyone...

 

[FvM]

how to use teansistor with diagrams

'll need to use two bjt to represent that dual collector bjt?

Yes, connect base and emitter of both.

I use transistor level op amp of ua741 instead of the op amp ua741 available in PSpice so that i can get the changes in frequency response when i vary the temperature. That's my main reason and i really hope it works.

It should basically work. For a realistic modelling, you have to understand the constraints of the 70th planar technology used with uA741 and choose correct transistor parameters, particularly for lateral and substrate pnp. Gray/Meyer Analysis and Design e.g. has all necessary information, you'll possibly also find transistor level models in literature.

Good luck.

 

[snee]

transistor level schematics

i got it. thank you very much!!!

Added after 33 minutes:

btw, can anyone tell me what is the different in schematic diagram for a normal op amp and a military operating temperature op amp?

I'll use Rbreak and Cbreak to adjust the temperature coefficient for resistor and capacitor in ua741.

How about the bjt for military operating temperature range use? do i have to adjust anything? Can anyone give example what to adjust?

Thanks.

 

[FvM]

741 op amp military

When you compare the specification, you'll notice that the typical parameters are completely or almost identical, which simply means, there is no difference in device parameters or circuit. Parts for extended temperature range are produced by selecting individual exemplars or complete charges with suitable parameters.

 

[snee]

ua741 schemat

Btw i got this from ua741 schematic diagram from Sedra/Smith book. Can i use this to represent ua741 though i can't find one datasheet of ua741 same as this.

 

[FvM]

lm741 ua741

It's identical to the Fairchildsemi datasheet, but with resistor dimensioning. However, I don't know, what the datasheet differences actually mean. They may be simplified variants of the real circuit. Unless you don't have a good chip photo, you won't be able to decide which is correct.

 

[snee]

ua 741cn to work as a current source

Btw is it any ways to represent this op amp in FET instead of BJT? Or a simpler circuit? Any example?

My student version PSpice just can support at most 10 transistors. A sad news for me after a try.

 

[jgruszynski]

ua741cn design

The dual emitter is a real device, of course. You can "model" it in the simplest form by using two transistors with bases and emitters tied together.

Effectively this is a current mirror built into a single "device" at design layout. Doing it as a single device improves the matching which as you know is critical for a good current mirror. Frankly the SPICE models aren't complete enough to know the difference between a merged device like this and two separate devices so it's a decent way to model it.

This is why analog circuit design, physical layout and semiconductor device modeling are such closely allied areas that usually you become an expert in all three when you pick one just one. That doesn't apply so much to digital circuit design though.

Added after 23 minutes:

@snee

The difference between any two manufacturers which isn't *in* the datasheet circuit level diagrams is that the transistors themselves are going to be different: different BF/BR, different IS. different VAF/VAR, etc. You have no way of determining these a priori because those are generally proprietary at least. Further the fab may rev the process and change all of them anyway, which requires that legacy designs will be tweaked by the manufacturer to recreate the datasheet spec values - it is, after all, just a black box product.

As a result the R1 and C5 values will be all over the place based on different manufacturer's individual process design and they may even change over time from the same manufacturer - they are only guaranteeing system level specs so they are free to change the internal implementation any time they want. It only happens that using the same basic topology tends to be the easiest way to change the process without changing the system specs.

The default SPICE BJT parameters will tend to work (they are "reasonable" defaults) but they represent no specific and real manufacturer's BJT process parameters exactly (or sometimes, even approximately).

In terms of military ranges, there are some things you can predict from the topology alone but not everything. Often you have to do process changes to extend operating performance and thus the SPICE model itself would be different. Temperature impact on performance is a big one that is process dependent. Further, reliability of process structures is highly influenced by temperature. Radiation is another one that generally requires specific process changes and knowledge to model.

There are also things that SPICE seriously fails to model well. Variation of parameters is something that every post-Berkeley-SPICE variant has had to bolt-on as an after thought. Most are clumsy and not physics-based in terms of environmental stress to process parameter relationships.

If you are running into student/demo product limits, be aware than pretty much any variant of SPICE will probably work well enough for this kind of simulation. You can use controlled-source macromodels instead of transistor level models but you will loose some specific predictive integrity. Temperature effects is usually the first casualty though not having the actual transistor models isn't much better.

All models are approximations; it's just a matter of what is sufficiently accurate and how much effort is required to attain it.

 

[antonio_eda]

transistor level

jgruszynski, thanks a lot for your clear and valuable lecture ;-)

 

[Audioguru]

there is no op amp in pspice student version

The lousy old 741 opamp is more than 40 years old. It should be buried.

 

[LvW]

internal diagram of opamp

The lousy old 741 opamp is more than 40 years old. It should be buried.

I am even older - by the way: how old are you ???

 

[antonio_eda]

ua 741 spice model

I like the subtitle of the oldest linux distribution: it's good because it works! 741 works too ;-)