Two-ways synchronizer (slow-to-fast and fast-to-slow)?

[ivlsi]

Hi All,

How to design a two-ways synchronizer, which would work for slow-to-fast as well as for fast-to-slow clock domains crossing?

Thank you!

 

[harpv]

A way to do this is to use handshaking as the mechanism for clock domain crossing. Handshake mechanism is independent of source and destination frequencies. Is this what you have in mind?

 

[ads-ee]

There is no generic method.

1. high speed signal that is active/inactive every clock cycle.
- use a FIFO

2. low speed level signal that transitions occasionally after many clock cycles (in destination domain).
- use a 2 FF synchronizer

3. pulse signal that has pulses spread multiple clock cycles apart (in destination domain).
- use a toggle synchronizer, (i.e. generate a toggle signal from the pulse followed by the 2 FF synchronizer)