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Two same width and same height layers drawn in layout

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VLSI_Learner

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If in the Layout drawing tool we by mistake draw same (same width and same height) layer on top of each other, so that that looks one, it is not going to create problems in layout as long as we deal it only with the tool and its flows. But want to know does it be considered two same size same width layer on top of each other during fabrication?
 

Two same layers will be merged anyway. 2 different layers might get you into a problem, depending on their circuit purpose.
 

Hi,

Two same layers will not be a problem since converting to GDSII file, layer code will used.
If different layer used with same geometry may cause problem but caught in verification steps.

Thanks and regards,
Basu
 

If u are using cadence . Use chained device option .
 

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