[SOLVED] tsmc n65 vias

[nitin mukesh]

Hey Everyone,

I am designing a circuit and I would like to know certain connections or VIAS which can be used.


Q1. To connect it to Pwell I am using M1_SUB there is no M1_Pwell am I right in choosing M1_SUB ?

Q2. I would like to have a connection between M1 and the NP region but there is no specific VIA M1_NP. what should I do in this case?

Q3. I have observed that wherever there is a connection between NP and M1 they have used OD. would not the OD block the connection between M1 and NP?


PS:
NP: N plus region
using TSMC65

 

[timof]

NP is an implant layer, that is implanted into active silicon, also known as OD (OD, moat, active, diffusion - are all different names for the same thing).
OD is not blocking a connection to M1, it facilitates, enables electrical connectivity from the FEOL to the BEOL.

Connection between OD and M1 is done by contacts (CONT), it's a special name for via, that goes down to diffusion or to poly layer from the lowest metal layer (M1 in this case).
To connect to well, you connect to OD (using CONT) first, then connect OD with well / substrate using well tap (a kind of a via, in silicon, from OD down to the well).