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TSMC I/O PAD LVS error

presun

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Hi, I am currently working on a layout using the TSMC 180n process. My current problem is with the I/O pads, I put the NETLIST file for the I/O pads into the SRC.NET file via INCLUDE and then run LVS, but it doesn't resolve the LVS error (I get the LVS error on the devices inside the pad).

I wondered if the netlist file was abnormal, so I tried running LVS with just the pad separately, and it passed fine.

I was wondering if anyone else has encountered the same thing?

1739246146162.png
 
As I know, using PAD netlist file in TSMC180 is not necessary, plain schematic should be enough to pass LVS. If your LVS is clean with the schematic view only, then it should be fine.
Re the netlist file - are you following the instructions provided by TSMC? Are you sure that you are using a correct netlist?
 
Check the "seams" when you stitch together pieces from different places.

Probing (to highlight) different error nets on the view where they -are- found ought to paint a picture around "why?".
 

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