Tristate inverter buffer not found.

[rohanjuneja]

Error : Unable to map design without a tristate buffer or inverter. [MAP-1] [synthesize]

We are using genus 'Version: 21.10-p002_1', and the whole run went for a couple of hours before throwing this error. Could you please help with this, any idea what might be causing this issue?

 

[oratie]

The reasons:
1. Tristate buffer is not in your library, or it is marked as dont_use (unusable).
2. You have multidrivent net in your design, so tool need tristate buffer to implement it (is it bug in RTL?)

 

[dick_freebird]

Maybe a tristate inverter is not part of the "generic gates" collection
that the error report (or snippet thereof) mentions.

Generic?

That would make this an exercise.

We love debugging pointless exercises with 0.1 clues.

 

[ThisIsNotSam]

you coded something with tristate (a bus?) but your lib has no cell for such type of logic. most modern cell libraries no longer have them, it is a pain in the ass to do a tristate in finfet