Transmission Gate design

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areebaa

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Hi,
I would like to pass and stop a signal using Transm. Gate TGATE. passing signal is 12V , 2MHz freq. can I control using 5V at the gate of each NMOS and Inv at PMOS.
as the VGS (5-12) <Vth . what other scheme i can use . Thank for help
thanks
 

Hi,

The posted image came from this: "Web_Ch3_final Using Op Amps with Data Converters" - it's the same design as yours but shows the inverter part as MOS devices.



You would think that 5V can drive devices stated as having from "x"V to 5V ON (if that's what you mean), but you'd have to try it or if there's a model (or you can set the relevant MOS SPICE, etc. parameters) simulate it as such mixed voltages haven't always worked for my breadboard experiments, or the result has worked but in a sub-optimal manner.

I see no reason why not: so long as you don't go over the - usually - VGSth MAX. ~20V on either input, but maybe the throughput may not be as ideal as desired, depending on what voltage is actually needed to fully turn on the transmission gate "valve".
 
Your control voltage for each FET gate has to swing past
threshold voltage far enough to drive the FET well off or
well on. A 12V signal and 0-5V gate drive will fail. You may
also push current from signal to well, or signal to substrate,
if your signal is beyond the rails. Start from the signal upper
and lower limit voltages and work backwards to supply and
control voltages.
 
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