Transfer function implementation on PIC32

[sztibi82]

Hi To all

I would like to implement a controller on a PIC32 microcontroller

Sadly i dont know why, the putput is 255 or 0, rarelly i can get a signal between them

Please could someone more experienced tell me what should i change

Thank you

#include <plib.h>

// Configuration Bit settings
// SYSCLK = 72 MHz (8MHz Crystal/ FPLLIDIV * FPLLMUL / FPLLODIV)
// PBCLK = 36 MHz
// Primary Osc w/PLL (XT+,HS+,EC+PLL)
// WDT OFF
// Other options are don't care
//
#pragma config FPLLMUL = MUL_18, FPLLIDIV = DIV_2, FPLLODIV = DIV_1, FWDTEN = OFF
#pragma config POSCMOD = HS, FNOSC = PRIPLL, FPBDIV = DIV_2

// Let compile time pre-processor calculate the PR1 (period)
#define FOSC           		72E6
#define PB_DIV         		8
#define PRESCALE       		256
#define TOGGLES_PER_SEC		15000
#define T1_TICK       		(FOSC/PB_DIV/PRESCALE/TOGGLES_PER_SEC)

unsigned int feedback;	// conversion result as read from result buffer
unsigned int reference;
double ref;
double fed;
double result;
unsigned int offset;
unsigned int loop;
double y_0;
double y_1;
double y_2;
double y_3;
double y_4;
double y_5;
double y_6;
double y_7;

double u_0;
double u_1;
double u_2;
double u_3;
double u_4;
double u_5;
double u_6;

double b_0;
double b_1;
double b_2;
double b_3;
double b_4;
double b_5;

double a_0;
double a_1;
double a_2;
double a_3;
double a_4;
double a_5;
double y_;
int main(void)
{
    //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    //STEP 1. Configure cache, wait states and peripheral bus clock
	// Configure the device for maximum performance.
	// This macro sets flash wait states, PBCLK divider and DRM wait states based on the specified
	// clock frequency. It also turns on the cache mode if avaialble.
	// Based on the current frequency, the PBCLK divider will be set at 1:2. This knoweldge
	// is required to correctly set UART baud rate, timer reload value and other time sensitive
	// setting.
	SYSTEMConfigPerformance(FOSC);
	
	CloseADC10();
    // Override PBDIV to 1:8 for this timer example
    mOSCSetPBDIV(OSC_PB_DIV_8);


	#define PARAM1  ADC_MODULE_ON | ADC_FORMAT_INTG | ADC_CLK_AUTO | ADC_AUTO_SAMPLING_ON
	#define PARAM2  ADC_VREF_AVDD_AVSS | ADC_OFFSET_CAL_DISABLE | ADC_SCAN_OFF | ADC_SAMPLES_PER_INT_2 | ADC_ALT_BUF_ON | ADC_ALT_INPUT_ON
	#define PARAM3  ADC_CONV_CLK_INTERNAL_RC | ADC_SAMPLE_TIME_15
	#define PARAM4	SKIP_SCAN_ALL
	#define PARAM5	ENABLE_AN3_ANA | ENABLE_AN4_ANA

	SetChanADC10(  ADC_CH0_NEG_SAMPLEB_NVREF | ADC_CH0_POS_SAMPLEB_AN3 | ADC_CH0_NEG_SAMPLEA_NVREF | ADC_CH0_POS_SAMPLEA_AN4  );
	OpenADC10( PARAM1, PARAM2, PARAM3, PARAM4, PARAM5 ); // configure ADC using parameter define above

	EnableADC10(); // Enable the ADC

	while ( ! mAD1GetIntFlag() ) { }


    //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    // STEP 2. configure Timer 1 using internal clock, 1:256 prescale

    OpenTimer1(T1_ON | T1_SOURCE_INT | T1_PS_1_256, T1_TICK);

    // set up the timer interrupt with a priority of 2
    ConfigIntTimer1(T1_INT_ON | T1_INT_PRIOR_2);

    // enable multi-vector interrupts
    INTEnableSystemMultiVectoredInt();

	// configure PORTD.RD0 = output
    mPORTESetPinsDigitalOut(BIT_0);
	mPORTESetPinsDigitalOut(BIT_1);
	mPORTESetPinsDigitalOut(BIT_2);
	mPORTESetPinsDigitalOut(BIT_3);
	mPORTESetPinsDigitalOut(BIT_4);
	mPORTESetPinsDigitalOut(BIT_5);
	mPORTESetPinsDigitalOut(BIT_6);
	mPORTESetPinsDigitalOut(BIT_7);
	mPORTESetPinsDigitalOut(BIT_8);
	mPORTESetPinsDigitalOut(BIT_9);
	mPORTESetPinsDigitalOut(BIT_10);
	mPORTESetPinsDigitalOut(BIT_11);
	mPORTESetPinsDigitalOut(BIT_12);
	mPORTESetPinsDigitalOut(BIT_13);
	mPORTESetPinsDigitalOut(BIT_14);
	mPORTESetPinsDigitalOut(BIT_15);


	mPORTDSetPinsDigitalOut(BIT_0);

	mPORTDSetPinsDigitalOut(BIT_1);
y_7=0;
y_6=0;
y_5=0;
y_4=0;
y_3=0;
y_2=0;
y_1=0;
y_0=0;

u_6=0;
u_5=0;
u_4=0;
u_3=0;
u_2=0;
u_1=0;
u_0=0;


// Regulator Transfer Function
//      b_5 b_4 b_3 b_2 b_1 b_0
//-----------------------------------------------------------------
//  1	a_5 a_4 a_3 a_2 a_1 a_0



b_5=-215.780080326155;
b_4=477.218796789085;
b_3=-396.523257805262;
b_2=169.140604103785;
b_1=-38.3294099942858;
b_0=3.69959246124159;

a_5=-2.23588994487889;
a_4=1.86997977823815;
a_3=-0.797246753084504;
a_2=0.180235639535461;
a_1=-0.0170776862076544;
a_0=7.07044425739722e-11;

/*
a_5=-a_5;
a_4=-a_4;
a_3=-a_3;
a_2=-a_2;
a_1=-a_1;
a_0=-a_0;
*/



    while(1);
}
	

void __ISR(_TIMER_1_VECTOR, ipl2) Timer1Handler(void)
{
    mT1ClearIntFlag();
	offset = 8 * ((~ReadActiveBufferADC10() & 0x01));  // determine which buffer is idle and create an offset
	feedback = ReadADC10(offset);  //intrarea
	while ( ! mAD1GetIntFlag() ) { }
	reference= ReadADC10(offset+1);   // iesirea
	while ( ! mAD1GetIntFlag() ) { }


	ref=(double)reference/8;

	fed=((double)feedback-80)/8;

	u_6=(ref-fed);


	y_=-a_5*y_5-a_4*y_4-a_3*y_3-a_2*y_2-a_1*y_1-a_0*y_0+b_5*u_5+b_4*u_4+b_3*u_3+b_2*u_2+b_1*u_1+b_0*u_0;
	



	y_6=y_/4;
	y_0=y_1;
	y_1=y_2;
	y_2=y_3;
	y_3=y_4;
	y_4=y_5;
	y_5=y_6;

	u_0=u_1;
	u_1=u_2;
	u_2=u_3;
	u_3=u_4;
	u_4=u_5;
	u_5=u_6;
	
	PORTE=255-(unsigned char)(y_6);
//mPORTEToggleBits(BIT_7);

}