transaction-based verification

[xihushui]

hi,who know this verification methodology:transaction-based verification.
could you explain what is it?or give some info about it.
it is best to give me some example (whdl or verilog)about how to write testbench use this methodology if you have .thank you
my email :jlong255@163.com

 

[uday_das]

Transaction -based verification is a kind of verification which is done in higher abstraction level. Hence often it is done from system level prospective. Here concept of transaction plays the key role. Testbench often can be written in two layer. The top layer is used to model transactional activities ( read, write, transfer) between the blocks without going too much detail into signal level. The bottom layer gives relation between transaction level functions with signal level details. By some google search you can get plenty of papers/materials etc.

 

[aji_vlsi]

hi,who know this verification methodology:transaction-based verification.
could you explain what is it?or give some info about it.
it is best to give me some example (whdl or verilog)about how to write testbench use this methodology if you have .thank you
my email :jlong255(at)163.com

On top of what Uday said (Good comments from Uday indeed), this is clearly the way industry is moving for verification, look for VMM (Synopsys), AVM (Mentor), eRM/URM (Cadence) all offer this nicely. AVM Cookbook downloadable from mentor.com can be handy for you. For your reference I co-authored a book on VMM adoption, see www.noveldv.com or www.systemverilog.us for details.

My company specializes on all these methodologies and help companies in their verification problems.

Good Luck
Ajeetha, CVC
www.noveldv.com

 

[ray123]

This papar talks about transaction-based verification methodology,
**broken link removed**

It seems to me that we all need to pay attention to transcation based verification sooner or later.

 

[samc]

Try to goolge it , you will find many papers about this.