anuradha.verma
Junior Member level 3
Hi,
I want to synthesis my VHDL code in design compiler.i want to use 90nm libaray.i have wriiten UPF for power gating implementation..
Can anyone tell me which library i should use for this purpose.i have SAEDPDK_EDK folder which contains many library .
I want to synthesis my VHDL code in design compiler.i want to use 90nm libaray.i have wriiten UPF for power gating implementation..
Can anyone tell me which library i should use for this purpose.i have SAEDPDK_EDK folder which contains many library .