Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Trade off's between normal MOS and low Vt MOS ?

Status
Not open for further replies.

kidmanbasha

Member level 1
Joined
May 25, 2007
Messages
39
Helped
3
Reputation
6
Reaction score
1
Trophy points
1,288
Activity points
1,587
low vt nmos

I have a 0.13u design kit and it has a Mosfet that is low Vt = 0.08v so I want to know what are the drawbacks of using such a transistor if there's any? Thanks
 

erikl

Super Moderator
Staff member
Joined
Sep 9, 2008
Messages
8,112
Helped
2,694
Reputation
5,368
Reaction score
2,293
Trophy points
1,393
Location
Germany
Activity points
44,054
normal mos

Only drawback is: you can't completely shut off such a MOSFET. Even with Vgt=0 it will "leak" a drain-source-current in the order of uA's (@ room temperature).
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top