To design an amplifier of gain 20 ---- Homework

[rahdirs]

Hi all,

I need to design an amplifier of gain 20,such that the first stage is CS stage with source degeneration resistance of 50Ω.It drives a source follower whose load is 50Ω.The overall gain of CS + Source follower is to be greater than 20.
Given L=0.18um,Vdd=1.8V,Rd in CS stage can be as large as possible.

This was my approach.

As gain of source follower is always less than 1,i first decided to get gain of CS stage as 20.But i'm not getting it.

my spice code--

********* Simulation Settings - General section *********
.include "E:\Stuff\Spice\SPICE PROGRAMS\Low Power Latch Design\Reference Latch\180nominal.md"
********* Simulation Settings - Parameters and SPICE Options *********
Vdd Vdd Gnd 1.8V
VVin Vin Gnd dc 1 SIN (1 0.1 1000000) AC 0.1
*-------- Devices: SPICE.ORDER > 0 --------
RResistor_1 N_2 Gnd  R=50  
RResistor_2 Vdd N_1  R=5k  
RResistor_3 N_3 Gnd  R=50  
MNMOS_1 N_1 Vin N_2 Gnd NMOS W=900n L=180n AS=810f PS=3.6u AD=810f PD=3.6u  
MNMOS_2 Vdd N_1 N_3 Gnd NMOS W=900n L=180n AS=810f PS=3.6u AD=810f PD=3.6u  

********* Simulation Settings - Analysis section *********

********* Simulation Settings - General section *********
.tran 0.1n 10000n
.print V(N_1),V(Vin)
********* Simulation Settings - Additional SPICE commands *********

.end

but i'm only getting gain of approx.1 at the drain end of CS stage.If i see output after Source follower,it would surely be less than 1.How can i get more gain ??

 

[crutschow]

50 ohms is a rather low resistance load for the output. Does it need to be that low?

What is the AC output voltage of the first stage?

 

[erikl]

... i first decided to get gain of CS stage as 20.But i'm not getting it.

You need a much higher gain than 20, because a lot of this gain is lost after the 50Ω source follower.

... i'm only getting gain of approx.1 at the drain end of CS stage.If i see output after Source follower,it would surely be less than 1.How can i get more gain ??

A rather high drain resistance is needed to achieve high gain in the CS stage. So a small drain current is needed for this stage. The source follower, however, uses a relatively large current, due to the low source resistance.

Find here an example: View attachment CS-amp.pdf
Note that the value of the bias voltage of the CS stage depends sensibly on the MOSFET's Vth (here Vth=0.42V). Usually the bias voltage is generated via a current mirror.