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To Design a single ended to fully differential converter

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vlsi12

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I designed an folded cascode FDA. However when designing a single ended to differential converter using the same FDA the output swings from the 2 output ports are not symmetrical. Any suggestions as what to do?
The feedback resistance is 50K and the input resistance is 25K pic.png
 

What's this, resistor or no resistor?

res.PNG


If the resistor network is symmetrical, the output voltage difference is probably due to insufficient common mode balancer gain or bandwidth.
 

Yes that is a resistor. Can you elaborate on the " insufficient common mode balancer gain or bandwidth." Any references in addition to the elaboration will really help.
 

Does it work in DC? Could you annotate the DC node voltages, and show some figures with different DC input values? If the common-mode feedback is good it should operate in DC.
 

As you suggested I varied the input dc voltage. For a common mode voltage of 900m and signal dc vaue of 0 at the input the outputs are same Vocm value..How ever as I increase the input signal dc value, complementary dc outputs are not the same value over or below the Vocm.resultsdc3.pngresultsdc1.pngresultsdc2.png
 

Why don't you report the DC levels instead of showing useless line plots? As far as I see, outp has gain of about 1 while outn has only -0.7. Suggests too low common mode loop gain.

We need to see substantial circuit information.
 

Sorry for the late reply. As you suggested the loop gain was low. I made the necessary modifications and the Circuit works fine. However the signal swing in the positive side is getting clipped and the negative swing is increased when I use a conventional DDA CMFB instead of the resistive average which I am using now. The resistive CMFB doesnot have any problem for the swing except the fact that it lowers the gain by loading the output. Any thoughts on thatswingclip.png?
 

You could increase the swing by decreasing the common-mode voltage. But no problem to use resistors if you have enough area and current consumption.. Be cautious with differential and common-mode stability, big resistors create pole with the error sense amplifier's input capacitance.
 

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