Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
You are correct - I used a Motorola data sheet and it clearly has errors in it. The TI data sheet shows it's correct operation.
The principle is still there though, in push-pull operation there will always be one or the other FET conducting so in theory they could be working 50/50 giving full power to the motor. In parallel operation, the FETs would conduct at the same time and also stop conducting at the same time so the duty cycle could be lower.
the output-control input when grounded disables the pulse-steering flip-flop and inhibits its outputs. In this mode, the pulses seen at the output of the dead-time control/PWM comparator are transmitted by both output transistors in parallel. when in normal operation when the control is + the output is in push-pull operation, Under this condition, each of the output transistors is enabled, alternately, by the pulse-steering flip-flop
Hence when the 2N2222 conducts the power will be Halved