[SOLVED] Timing ECO in ASIC design flow

[phoenixpavan]

Hi Guys,

Please someone provide some documents/reading material regarding Functional and Non-functional ECO's... I already have Human ECO compiler document

Thanks

 

[silencer3]

Functional ECO - to CORRECT/Change the design functionality after the implementation has started and dont have a chance to go back to synthesis
Timing ECO - to fix all timing violations such as setup, hold, recovery, removal, DRV (max_fanout, max_capacitance, max_tranisiton)

 

[phoenixpavan]

If you have any documents regarding the same..please share.

Thanks

 

[phoenixpavan]

Guys..still waiting for ECO!!!