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Timing-aware Place&Route using SoC encounter

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ifforums

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Place&Route using SoC encounter

Hi all,


1) Could you please let me know how can I consider timing-related constraints on place and route. In DC when we are performing synthesis, we can put a kind of constraint on the maximum delay between inputs and ouputs (e.g. delay between in1 and out1 not exceed X ps). I am wondering if there is a similar method in encouter?

2) I forced my DC to meet the delay limit. but I cannot reduce the delay beyond an specific point. Is there any way to resolve the problem by place&route?



Thank you

Victor
 
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vijayR15

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Timing related constraints in pnr(encounter) will be on sdc. u can also add in encounter terminal window. Below is an example

ex:-set_max_delay 0.2 -from [get_ports {dln_tx_UlpsActiveNot[3]}] -to [get_ports {bist_seed[3]}]
 

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