Timer0 and timer1 external clock requirements

[PA3040]

Dear All
Please help me to read this information on this picture

thanks in advance

 

[wp100]

Hi,

Instruction cycle period (TCY) equals four times the input oscillator time base period for all configurations
except PLL.

So what that table is basically saying is do not supply Timer0/1 with a clock pulse faster than the PICs main oscillator / TCY can handle.

 

[PA3040]

Dear all

Now I bit understood operation of timer0 counter mode of 16f877a
see picture


as I know
The internal sampling that occurs on the T0CKI signal takes two clock cycles of the PIC
microcontrollers oscillator. Divide 2 by the oscillator frequency in Hz to obtain an
answer in seconds (same as multiplying the oscillator frequency in seconds by 0.5).
The 20 nS added at the end of the equations represents a small 20 nS RC delay
present within the device.

as per above I need to know every clocks from TOCKI pin exist above delay
Please advice

 

[PA3040]

Dear All,
Please advice me what is the advantage timer0 sync with internal clock than if it is run as an asynchronous mode
(I know that timer0 can not run as an asynchronous mode)
please help

 

[PA3040]

Dear All,

please see attached picture,

Timer0 1:2,1:4,1:8 ......

Timer1 Divide/2 ,, /4.../8
what is deferment